PART |
Description |
Maker |
ICS831742I |
Differential Clock/Data Multiplexer
|
Integrated Device Technology, Inc.
|
DM74ALS153 DM74ALS153SJ DM74ALS153M DM74ALS153N DM |
Dual 1-of-4 Line Data Selector/Multiplexer 4-Input Digital Multiplexer
|
FAIRCHILD[Fairchild Semiconductor] Fairchild Semiconductor Corporation
|
DM74LS151 DM74LS151M DM74LS151N DM74LS151SJ 74LS15 |
8-Input Digital Multiplexer 1-of-8 Line Data Selector/Multiplexer
|
Fairchild Semiconductor Corporation FAIRCHILD[Fairchild Semiconductor]
|
DM74ALS157 DM74ALS157.PDF DM74ALS158 DM74ALS158N D |
Quad 1 of 2 Line Data Selector/Multiplexers From old datasheet system Quad 1-of-2 Line Data Selector/Multiplexer ALS SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDIP16 Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset 14-SO -40 to 85 ALS SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, INVERTED OUTPUT, PDIP16
|
FAIRCHILD[Fairchild Semiconductor] Fairchild Semiconductor, Corp.
|
DM74ALS257MX DM74ALS257MXNL |
3-STATE Quad 1-of-2 Line Data Selector/Multiplexer; Package: SOIC; No of Pins: 16; Container: Tape & Reel ALS SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16 3-STATE Quad 1-of-2 Line Data Selector/Multiplexer ALS SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16
|
Fairchild Semiconductor, Corp.
|
VSC1238 VSC1237 |
9.9 to 12.5 Gbps 16:1 Multiplexer with Clock Multiplier Unit and Demultiplexer with Clock Recovery Chip Set
|
Vitesse Semiconductor Corporation.
|
MAX9320EUA-T MAX9320AEKA-T |
2.25 V to 3.8 V, 1:2 differential LVPECL/LVECL/HSTL clock and data driver 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers 9320 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
|
MAXIM - Dallas Semiconductor Maxim Integrated Products, Inc.
|
M13S128324A-2M |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
M13S5121632A-2S |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
W9725G6JB25I |
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
W9751G6KB-18 W9751G6KB-25 W9751G6KB-3 W9751G6KB25A |
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|